### 2-15 Double-Length
Add/Subtract

Using one of the expressions shown on page 29
for overflow of unsigned addition and subtraction, we can easily implement
double-length addition and subtraction without accessing the machine's carry
bit. To illustrate with double-length addition, let the operands be (x_{1}, x_{0})
and (y_{1}, y_{0}), and the result be (z_{1}, z_{0}).
Subscript 1 denotes the most significant half, and subscript 0 the least
significant. We assume that all 32 bits of the registers are used. The less
significant words are unsigned quantities.

This executes in nine instructions. The
second line can be permitting a
four-instruction solution on machines that have this comparison operator in a
form that gives the result as a 1 or 0 in a register, such as the "`SLTU`" (Set on Less Than Unsigned) instruction on MIPS [MIPS].

Similar code for double-length subtraction (x - y) is

This executes in eight instructions on a
machine that has a full set of logical instructions. The second line can be permitting a four-instruction
solution on machines that have the "`SLTU`" instruction.

Double-length addition and subtraction can be
done in five instructions on most machines by representing the multiple-length
data using only 31 bits of the least significant words, with the high-order bit
being 0 except momentarily when it contains a carry or borrow bit.